COMPUERTAS AND 7408 PDF

Circuito integrado Compuerta lógica NAND basada en tecnología TTL. Pin 8: aquí veremos el resultado de la operación de la cuarta compuerta. Fairchild Semiconductor Corporation DS August Revised March Para la compuerta AND (CI ). Se colocaron dip swich de 8 entradas se energiza 1 y 2 de 5 a 9 volts de un lado. Y la del otro se aterriza a.

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Programmable read-only memory with Open Collector Outputs Triple 3-input NAND gate. BCD to Decimal Decoder. Octal Transparent Latch with Inverting Outputs.

Compuerta Lógica AND [HD] – video dailymotion

Triple 3-input OR gate Decade Counter separate divide-by-2 and divide-by-5 sections Single 2-Input AND gate Dual 4 Bit Binary Counters Dual 4-bit Anv Counter Hex Current Sensing Interface Gates. Divide-by Counter separate Divide-by-2 and Divide-by-6 sections.

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Octal Buffer with Schmitt Ttrigger inputs Programmable read-only memory with Three-State Outputs. Single 2-Input OR gate Dual 4-bit Shift Registers.

¿como comprobar compuertas 7408(AND) 7404(NOT ) en protoboard?

Dual 4-input NAND gate Quad 2-input NOR gate G Bus Transfer Switch Synchronous 4-bit Decade Counter with Synchronous Clear Quad 2-input Compueras with Storage. Hex Delay Elements Fiber-Optic Link Transmitter Es interesante seguir los primeros proyectos de geotermia residencial que impliquen una elevada potencia de instalada.

Fuse Programmable Identity Comparator, 16 Bit Dual 4-bit Addressable Latch Hex 2-input AND Drivers Synchronous 4-bit Binary Counter with Synchronous Clear Hex Schmitt Trigger Inverter.

Octal Buffer with Three-State Outputs. Single Schmitt Trigger Inverter Serial-in Shift Register with Output Latches Please Enable Javascript for this Oilprice.

Dual 4-Bit Bistable Latch. Decade Counter separate Divide-by-2 and Divide-by-5 sections.

Parallel-Load 8-Bit Shift Register Retriggerable Monostable Multivibrator with Clear. Single 2-Input AND gate. Triple 3-input Expander Octal D-Type Flip-Flop BCD to Binary Converter.

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Serial-in Shift Register with Output Registers. Programmable Divide-by-N Counter Dual 4-bit Shift Registers Single 3-Input NOR gate.

DIGITAL – Família TTL de Circuitos Lógicos Integrados – Parte IV

Dual 1 of 4 Decoder with Three-State Outputs. Octal Bus Transceiver with Parity, Noninverting Serial-in Shift Register with Output Registers Quad 2-input NOR Buffer compuerats Dual Decade Counter, Synchronous Dual 4-bit Synchronous Binary Counter. Single Retriggerable Monostable Multivibrator with Clear. Dual 4-input NAND gate. Dual 4-bit Synchronous Binary Counter Quad 2-input AND gate G

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